Principal Verification Engineer Job at Cypress HCM, San Jose, CA

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  • Cypress HCM
  • San Jose, CA

Job Description

Principal Verification Engineer

Location: San Jose, CA 95134 or Morrisville, NC 27560

Hybrid Remote: 3 days in the office per week | Reporting To: Director, Design Engineering

Responsibilities:

  • Serving as a technical lead with a focus on full chip and/or blocks-level verification engineering
  • Collaborating with inventors, engineers, and many others in a dynamic R&D environment
  • Mentoring junior team members as needed on verification engineering best practices
  • Defining verification plans in collaboration with architects, logic, and mixed signal designers
  • Working to achieve code coverage goals and ensuring thoroughly verified designs
  • Implementing testbenches, monitors, and scoreboards using the UVM methodology
  • Working closely with the lab and systems teams for test plans, silicon bring up, and debugging

Requirements:

  • 7+ years of professional experience in verification engineering for memory integrated circuits
  • Hands-on experience with DDR memory interfaces, including DDR PHY (DDR4 PHY, DDR5 PHY)
  • Experience with UVM methodology and coding in SystemVerilog or Verilog
  • Experience with standard ASIC verification flow and software tools
  • Experience with mixed-signal integrated circuits (IC)
  • Strong coding and scripting skills in Linux/Unix environments
  • Experience leading technical solutions across organizations

Benefits:

  • Competitive medical, dental, vision, and life insurance plans – including HSA and FSA options
  • 401K plan with company match
  • Employee stock purchase plan (15% discount)
  • Charitable gift giving match/plan
  • Relocation assistance

Compensation:

  • $200K - $240K + Bonus + RSUs

Job Tags

Relocation package,

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